Laterally diffused MOSFET (LDMOS) on fully depleted SOI (FDSOI) is gaining increased attention in semiconductor industry because it requires smaller dimensions compared to bulk LDMOS. Designing an LDMOS on FDSOI may form a drain that includes a lightly doped segment. The lightly doped drain (LDD) segment provides a voltage drop from the drain to edge of the gate that can help prevent gate dielectric breakdown. Thus, the LDMOS on FDSOI may support higher breakdown voltages compared to bulk LDMOS. However, the LDD segment also adds to the resistance of the LDMOS in on-state (on-resistance) which can be an issue in applications where fast turn on of the LDMOS is required. Therefore, providing an LDMOS on FDSOI with low resistance in on-state is highly desirable.